{"id":738,"date":"2022-06-27T14:22:48","date_gmt":"2022-06-27T06:22:48","guid":{"rendered":"http:\/\/www.rchen.top\/?p=738"},"modified":"2022-06-27T14:23:20","modified_gmt":"2022-06-27T06:23:20","slug":"ic%e8%ae%be%e8%ae%a1%e4%b8%ad%e7%9a%84%e5%90%84%e9%98%b6%e6%ae%b5%e5%92%8c%e5%af%b9%e5%ba%94%e8%bd%af%e4%bb%b6%e6%8c%81%e7%bb%ad%e6%9b%b4%e6%96%b0","status":"publish","type":"post","link":"https:\/\/www.rchen.top\/?p=738","title":{"rendered":"IC\u8bbe\u8ba1\u4e2d\u7684\u5404\u9636\u6bb5\u548c\u5bf9\u5e94\u8f6f\u4ef6(\u6301\u7eed\u66f4\u65b0)"},"content":{"rendered":"

\u6570\u5b57<\/span>IC<\/span>\u8bbe\u8ba1<\/span><\/p>\n

\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n
\n

\u9636\u6bb5<\/span><\/p>\n<\/td>\n

\n

EDA<\/span>\u5de5\u5177<\/span><\/p>\n<\/td>\n

\n

\u63cf\u8ff0<\/span><\/p>\n<\/td>\n<\/tr>\n

\n

\u524d\u7aef<\/span><\/p>\n<\/td>\n

\n

\n<\/td>\n

\n

\n<\/td>\n<\/tr>\n

\n

\u67b6\u6784\u7684\u8bbe\u8ba1\u4e0e\u9a8c\u8bc1<\/p>\n<\/td>\n

\n

CoCentric<\/p>\n<\/td>\n

\n

\u5bf9\u6574\u4f53\u7684\u8bbe\u8ba1\u5212\u5206\u6a21\u5757<\/p>\n<\/td>\n<\/tr>\n

\n

RTL Source Code<\/p>\n<\/td>\n

\n

gvim<\/p>\n<\/td>\n

\n

\n<\/td>\n<\/tr>\n

\n

RTL Design<\/p>\n<\/td>\n

\n

Verilog\/VHDL<\/p>\n<\/td>\n

\n

HDL\u8bbe\u8ba1\u8f93\u5165<\/span>\uff0c<\/span>\u4e3b\u8981\u6709VHDL\u548cVerilog HDL \u8fd9\u4e24\u79cd\u786c\u4ef6\u63cf\u8ff0\u8bed\u8a00<\/span><\/p>\n<\/td>\n<\/tr>\n

\n

Simulation\/Function Verification<\/p>\n<\/td>\n

\n

Cadence NCVerilog\/XCELIUM2<\/p>\n

Synopsys VCS<\/p>\n

Mentor Modelsim<\/p>\n<\/td>\n

\n

RTL\u524d\u4eff\u771f\u5de5\u5177\uff08\u529f\u80fd\u4eff\u771f\uff09<\/p>\n<\/td>\n<\/tr>\n

\n

Synthesis<\/p>\n<\/td>\n

\n

Synopsys Design Compiler<\/p>\n<\/td>\n

\n

\u903b\u8f91\u7efc\u5408<\/span>\uff0c<\/span>\u5c06HDL\u8bed\u8a00\u8f6c\u6362\u6210\u95e8\u7ea7\u7f51\u8868Netlist<\/span>\u3002<\/span>\u903b\u8f91\u7efc\u5408\u4e4b\u524d\u7684\u4eff\u771f\u4e3a\u524d\u4eff\u771f\uff0c\u4e4b\u540e\u7684\u4eff\u771f\u4e3a\u540e\u4eff\u771f<\/span><\/p>\n<\/td>\n<\/tr>\n

\n

Formal Verification<\/p>\n<\/td>\n

\n

Cadence Conformal<\/p>\n

Synopsys Formality<\/p>\n<\/td>\n

\n

\u5f62\u5f0f\u9a8c\u8bc1\uff0c<\/span>\u5bf9\u7efc\u5408\u540e\u7684\u7f51\u8868\u8fdb\u884c\u9a8c\u8bc1<\/span><\/p>\n<\/td>\n<\/tr>\n

\n

\u9759\u6001\u65f6\u5e8f\u5206\u6790\uff08<\/span>STA<\/span>\uff09<\/span><\/p>\n<\/td>\n

\n

Synopsys Primetime<\/p>\n

Cadence Tempus<\/p>\n<\/td>\n

\n

\u68c0\u67e5\u7535\u8def\u7684\u5efa\u7acb\u65f6\u95f4\uff08Setuptime\uff09\u548c\u4fdd\u6301\u65f6\u95f4\uff08Hold time\uff09\u662f\u5426\u6709\u8fdd\u4f8b\uff08Violation\uff09<\/p>\n<\/td>\n<\/tr>\n

\n

\u540e\u7aef<\/span><\/p>\n<\/td>\n

\n

\n<\/td>\n

\n

\n<\/td>\n<\/tr>\n

\n

\u6570\u636e\u51c6\u5907<\/p>\n<\/td>\n

\n

\n<\/td>\n

\n

Foundry\u5382\u63d0\u4f9b\u7684\u6807\u51c6\u5355\u5143\u3001\u5b8f\u5355\u5143\u548cI\/O Pad\u7684\u5e93\u6587\u4ef6,\u5b83\u5305\u62ec\u7269\u7406\u5e93\u3001\u65f6\u5e8f\u5e93\u53ca\u7f51\u8868\u5e93,\u5206\u522b\u4ee5.lef\u3001.tlf\u548c.v\u7684\u5f62\u5f0f\u7ed9\u51fa<\/p>\n<\/td>\n<\/tr>\n

\n

\u529f\u8017\u4f18\u5316\u4e0e\u5206\u6790<\/p>\n<\/td>\n

\n

Cadence Voltus<\/p>\n

Ansys Redhawk<\/p>\n<\/td>\n

\n

\n<\/td>\n<\/tr>\n

\n

DFT\uff08design for test\uff09\u53ef\u6d4b\u6027\u8bbe\u8ba1<\/p>\n<\/td>\n

\n

S<\/span>ynopsys DFTCompiler<\/span><\/p>\n

M<\/span>entor Tessent<\/span><\/p>\n<\/td>\n

\n

DFT\u662f\u5728\u5f97\u5230Netlist\u4e4b\u540e\uff0c\u5e03\u5c40\u5e03\u7ebf\uff08Place and Route\uff09\u4e4b\u524d\u8fdb\u884c\u8bbe\u8ba1<\/p>\n<\/td>\n<\/tr>\n

\n

\u5e03\u5c40\u5e03\u7ebf<\/span>\uff08Place and Route\uff09<\/span><\/p>\n<\/td>\n

\n

Cadence Innovus<\/p>\n

Synopsys\u7684Astro<\/p>\n

Synopsys ICC2<\/p>\n<\/td>\n

\n

\uff08ICC\u662fAstro\u7684\u4e0b\u4e00\u4ee3\u53d6\u4ee3\u4ea7\u54c1\uff09<\/p>\n<\/td>\n<\/tr>\n

\n

\u65f6\u949f\u6811\u7efc\u5408CTS\uff08Clock Tree Synthesis\uff09<\/p>\n<\/td>\n

\n

Synopsys\u7684Physical Compiler<\/p>\n

\n<\/td>\n

\n

\n<\/td>\n<\/tr>\n

\n

DRC\uff08\u8bbe\u8ba1\u89c4\u5219\u68c0\u67e5\uff09\u3001LVS\uff08\u7248\u56fe\u4e00\u81f4\u6027\u68c0\u67e5\uff09<\/p>\n<\/td>\n

\n

Mentor\uff1aCalibre<\/p>\n

Synopsys\uff1aHercules<\/p>\n

Cadence\uff1aDiva\/dracula<\/p>\n<\/td>\n

\n

\n<\/td>\n<\/tr>\n

\n

\u7269\u7406\u9a8c\u8bc1<\/p>\n<\/td>\n

\n

Mentor Calibre<\/p>\n<\/td>\n

\n

\n<\/td>\n<\/tr>\n

\n

Tape out<\/p>\n<\/td>\n

\n

\n<\/td>\n

\n

\u7248\u56feGDS\u2161\u6587\u4ef6\u4f20\u9012\u7ed9Foundry\u5382\u8fdb\u884c\u63a9\u819c\u5236\u9020\uff0c\u4e5f\u5c31\u662f\u6d41\u7247<\/p>\n<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n<\/div>\n

<\/p>\n

\u6a21\u62df<\/span>IC<\/span>\u8bbe\u8ba1<\/span><\/p>\n

\n\n\n\n\n\n\n\n\n\n
\n

IC<\/span>\u6d41\u7a0b<\/span><\/p>\n<\/td>\n

\n

EDA<\/span>\u5de5\u5177<\/span><\/p>\n<\/td>\n

\n

\u63cf\u8ff0<\/span><\/p>\n<\/td>\n<\/tr>\n

\n

\u6a21\u62df\u7535\u8def\u8bbe\u8ba1<\/p>\n<\/td>\n

\n

Cadence Virtuoso<\/p>\n<\/td>\n

\n

\n<\/td>\n<\/tr>\n

\n

Spice<\/span>\u4eff\u771f<\/span><\/p>\n<\/td>\n

\n

Cadence Spectre<\/p>\n

Synopsys Hspice<\/p>\n<\/td>\n

\n

\n<\/td>\n<\/tr>\n

\n

\u7248\u56fe<\/span>-\u8bbe\u8ba1\u89c4\u5219\u68c0\u67e5\uff08DRC\uff09<\/span><\/p>\n<\/td>\n

\n

Cadence PVS<\/p>\n

Mentor Calibre<\/p>\n<\/td>\n

\n

\n<\/td>\n<\/tr>\n

\n

\u7248\u56fe<\/span>-\u7535\u8def\u56fe\u4e00\u81f4\u6027\u68c0\u67e5\uff08LVS\uff09<\/span><\/p>\n<\/td>\n

\n

Cadence PVS<\/p>\n

Mentor Calibre<\/p>\n<\/td>\n

\n

\n<\/td>\n<\/tr>\n

\n

\u540e\u4eff\u771f \u2013 \u5bc4\u751f\u53c2\u6570\u63d0\u53d6\uff08Extract\uff09<\/p>\n<\/td>\n

\n

Cadence Quantus<\/p>\n<\/td>\n

\n

\n<\/td>\n<\/tr>\n

\n

Tape out<\/p>\n<\/td>\n

\n

\n<\/td>\n

\n

\u7248\u56feGD<\/span>S<\/span>\u6587\u4ef6\u4f20\u9012\u7ed9Foundry\u5382\u8fdb\u884c\u63a9\u819c\u5236\u9020\uff0c\u4e5f\u5c31\u662f\u6d41\u7247 <\/span><\/p>\n<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n<\/div>\n","protected":false},"excerpt":{"rendered":"

\u6570\u5b57IC\u8bbe\u8ba1 \u9636\u6bb5 EDA\u5de5\u5177 \u63cf\u8ff0 \u524d\u7aef \u67b6\u6784\u7684\u8bbe\u8ba1\u4e0e\u9a8c\u8bc1 CoCentric \u5bf9\u6574\u4f53\u7684\u8bbe\u8ba1\u5212\u5206\u6a21\u5757 RTL […]<\/p>\n","protected":false},"author":1,"featured_media":473,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[90],"tags":[107],"class_list":["post-738","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-eda","tag-eda"],"_links":{"self":[{"href":"https:\/\/www.rchen.top\/index.php?rest_route=\/wp\/v2\/posts\/738","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/www.rchen.top\/index.php?rest_route=\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/www.rchen.top\/index.php?rest_route=\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/www.rchen.top\/index.php?rest_route=\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"https:\/\/www.rchen.top\/index.php?rest_route=%2Fwp%2Fv2%2Fcomments&post=738"}],"version-history":[{"count":2,"href":"https:\/\/www.rchen.top\/index.php?rest_route=\/wp\/v2\/posts\/738\/revisions"}],"predecessor-version":[{"id":741,"href":"https:\/\/www.rchen.top\/index.php?rest_route=\/wp\/v2\/posts\/738\/revisions\/741"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/www.rchen.top\/index.php?rest_route=\/wp\/v2\/media\/473"}],"wp:attachment":[{"href":"https:\/\/www.rchen.top\/index.php?rest_route=%2Fwp%2Fv2%2Fmedia&parent=738"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/www.rchen.top\/index.php?rest_route=%2Fwp%2Fv2%2Fcategories&post=738"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/www.rchen.top\/index.php?rest_route=%2Fwp%2Fv2%2Ftags&post=738"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}